Asynchronous’ Impact On Tools
In the right situation, using asynchronous logic makes a lot of sense—especially for security and IoT. But moving into the asynchronous design involves making tradeoffs, figuring out how the technical...
View ArticleHow Much Security Is Enough?
Semiconductor Engineering sat down to discuss the current state of security and what must be done in the future, with Denis Noël, head of cyber security solutions at NXP; Serge Leef, vice president of...
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SoC Connectivity Verification Nightmare
At the recent 2015 women’s World Cup soccer final in Canada, Japan was completely caught off guard in the first 15 minutes (and 4 seconds) by the USA. They were wary of the “set-piece” play by the USA...
View ArticleCloud 2.0
Corporate data centers are reluctant adopters of new technology. There is too much at stake to make quick changes, which accounts for a number of failed semiconductor startups over the past decade with...
View ArticleSpeeding Up Analog
Semiconductor Engineering sat down to discuss analog design and how to speed it up with Kurt Shuler, vice president of marketing at Arteris; Bernard Murphy, CTO at Atrenta; Wilbur Luo, senior group...
View ArticlePower Breaks Everything
The emphasis on lowering power in everything from wearable electronics to data centers is turning into a perfect storm for the semiconductor ecosystem. Existing methodologies need to be fixed,...
View ArticleSpeeding Up Analog
Semiconductor Engineering sat down to discuss analog design and how to speed up analog circuits with Kurt Shuler, vice president of marketing at Arteris; Bernard Murphy, CTO at Atrenta; Wilbur Luo,...
View ArticleHow Much Security Is Enough?
Semiconductor Engineering sat down to discuss the current state of security and what must be done in the future, with Denis Noël, head of cyber security solutions at NXP; Serge Leef, vice president of...
View ArticleSpeeding Up Analog
Semiconductor Engineering sat down to discuss analog design and how to speed up analog circuits with Kurt Shuler, vice president of marketing at Arteris; Bernard Murphy, CTO at Atrenta; Wilbur Luo,...
View ArticleHow Much Security Is Enough?
Semiconductor Engineering sat down to discuss the current state of security and what must be done in the future, with Denis Noël, head of cyber security solutions at NXP; Serge Leef, vice president of...
View ArticleThe Week In Review: Design/IoT
Imec and Cadence completed the first tapeout of a 5nm test chip. Using a processor design, the companies taped out a set of designs using EUV lithography as well as Self-Aligned Quadruple Patterning...
View ArticleARM Buys Carbon
ARM acquired Carbon Design Systems and its staff for an undisclosed amount of money, adding virtual prototyping capabilities for ARM cores. The deal is the latest in an onslaught of mergers and...
View ArticleDefining Sufficient Coverage
Semiconductor Engineering sat down to discuss the definition of sufficient coverage as a part of verification closure with Harry Foster, chief scientist at Mentor Graphics, Willard Tu, director of...
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Defining Sufficient Coverage
Semiconductor engineering sat down to discuss the definition of sufficiency of coverage as a part of verification closure with Harry Foster, chief scientist at Mentor Graphics; Willard Tu, director of...
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Defining Sufficient Coverage
Semiconductor engineering sat down to discuss the definition of sufficiency of coverage as a part of verification closure with Harry Foster, chief scientist at Mentor Graphics; Willard Tu, director of...
View ArticleEDAC Changes Name
The EDA Consortium today changed its name to the Electronic System Design Alliance, a move that expands the group’s charter to reflect shifts that have been underway in the chip design world for some...
View ArticleBridging The IP Divide
The adoption of an IP-based model has enabled designs to keep filling the available chip area while allowing design time to shrink. But there is a divide between IP providers and IP users. It is an...
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